有机非挥发存储器件:浮栅结构有机薄膜晶体管

提出了一种浮栅结构的新型有机薄膜晶体管(FG-OTFT)器件,并阐述了这种器件的工作机理.该器件通过控制浮 置栅上的电荷来控制 FG-OTFT 器件的阈值电压的大小,而器件不同的阈值电压便可用来存储“0”和“1”两个状态,故这种器 件可以被用作有机非挥发存储器.我们通过计算机数值模拟的方法对这种器件进行了研究.研究表明...     

检测中断后机载雷达航迹连续跟踪算法

雷达检测数据的连续性对于雷达航迹跟踪来说是非常重要的,根据观测目标特性的不同,中断检测时长不同会造成不同程度的航迹误跟、漏跟甚至失跟。分析了在某些特定情况下出现雷达检测中断后对航迹处理造成的影响,针对常规航迹跟踪处理方法,从原理上对中断检测对航迹连续带来的问题进行了详细分析,设计并实现了一种检测中断前后航迹连续跟踪算法,获得了较为满意的效果,并通过仿真和实测数据的处理验证了方法的有效性。     

基于FPGA的VME总线接口的设计与实现

介绍了一种用现场可编程门阵列（FPGA）实现虚拟机器环境（VME）总线接口的设计方法。该设计采用Al-tera公司的高密度的Stratix系列的FPGA来实现,给出了相应的程序设计原理和实现框图,重点论述了基于FPGA的VME总线接口设计原理和仿真,设计结果得到了实践的检验。     

Material properties and effective work function of reactive sputtered TaN gate electrodes

The resistivity,crystalline structure and effective work function（EWF） of reactive sputtered TaN has been investigated.As-deposited TaN films have an fcc structure.After post-metal annealing（PMA） at 900℃,the TaN films deposited with a N₂ flow rate greater than 6.5 sccm keep their fee structure,while the films deposited with a N₂ flow rate lower than 6.25 seem exhibit a microstructure change.The flatband voltages of gate stacks with TaN films as gate electrodes on SiO₂ and HfO₂ are also measured.It is concluded that a dipole is formed at the dielectric-TaN interface and its contribution to the EWF of TaN changes with the Ta/N ratio in TaN,the underneath dielectric layer and the PMA conditions.     

A novel monolithic ultraviolet image sensor based on a standard CMOS process

We present a monolithic ultraviolet(UV) image sensor based on a standard CMOS process.A compact UV sensitive device structure is designed as a pixel for the image sensor.This UV image sensor consists of a CMOS pixel array,high-voltage switches,a readout circuit and a digital control circuit.A 16×16 image sensor prototype chip is implemented in a 0.18μm standard CMOS logic process.The pixel and image sensor were measured. Experimental results demonstrate that the image sensor has a high sensitivity of 0.072 V/(mJ/cm~2) and can capture a UV image.It is suitable for large-scale monolithic bio-medical and space applications.     

基于NIOSⅡ的多串口数据通信的实现

串口传输常用于基于FPGA和DSP结构的信号处理板和外部设备之间的数据交换。以GPS RTK定位应用为基础,针对单个串口全双工传输不足以应对多种数据类型同时输入输出的情形,设计并实现了一种面向多串口不同类型数据的传输方案。该方案通过增加串口控制寄存器实现单个中断信号即可控制所有串口,采用乒乓交替读写实现数据持续高速输入。测试表明该方案可独立对各串口进行配置,可同时实现GPS定位结果、差分GPS修正数据与外界的交换以及用户控制命令的输入,并且可减少硬件调试时间,节约硬件资源。     

On modeling the digital gate delay under process variation

To achieve a characterization method for the gate delay library used in block based statistical static timing analysis with neither unacceptably poor accuracy nor forbiddingly high cost,we found that general-purpose gate delay models are useful as intermediaries between the circuit simulation data and the gate delay models in required forms.In this work,two gate delay models for process variation considering different driving and loading conditions are proposed.From the testing results,these two models,especially the one that combines effective dimension reduction(EDR) from statistics society with comprehensive gate delay models,offer good accuracy with low characterization cost,and they are thus competent for use in statistical timing analysis(SSTA).In addition, these two models have their own value in other SSTA techniques.     

Dry etching of poly-Si/TaN/HfSiON gate stack for advanced complementary metal-oxide-semiconductor devices

A novel dry etching process of a poly-Si/TaN/HfSiON gate stack for advanced complementary metal-oxide-semiconductor（CMOS） devices is investigated.Our strategy to process a poly-Si/TaN/HfSiON gate stack is that each layer of gate stack is selectively etched with a vertical profile.First,a three-step plasma etching process is developed to get a vertical poly-Si profile and a reliable etch-stop on a TaN metal gate.Then different BCl₃-based plasmas are applied to etch the TaN metal gate and find that BCl₃/Cl₂/O₂/Ar plasma is a suitable choice to get a vertical TaN profile.Moreover,considering that Cl₂ almost has no selectivity to Si substrate, BCl₃/Ar plasma is applied to etch HfSiON dielectric to improve the selectivity to Si substrate after the TaN metal gate is vertically etched off by the optimized BCl₃/Cl₂/O₂/Ar plasma.Finally,we have succeeded in etching a poly-Si/TaN/HfSiON stack with a vertical profile and almost no Si loss utilizing these new etching technologies.     

判奇电路实现方法探讨

以三输入判奇电路设计为例,通过对其输出函数表达式的形式变换,分别采用多种门电路及译码器、数据选择器等74系列器件进行电路设计,给出了7种电路实现形式,并分析了各种电路实现的优缺点。此例说明了组合逻辑电路设计的灵活性及电路实现的多样性。所采用的设计方法对其他组合逻辑电路设计具有一定的启发与指导意义。     

抗冲磨混凝土配合比设计与施工工艺

针对唐河水电站重力坝、泄洪闸抗冲磨混凝土设计标准,通过现场配合比试验,取得抗冲磨混凝土施工工艺及参数,使混凝土性能得到进一步改善,为水电站大坝泄洪闸闸墩、消力池抗冲磨混凝土浇筑施工提供指导。